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Successful Cases
v Self-biased
PLL design
Ø On
its first design, Haokai successfully developed a 3.5 GHz PLL and 300 MHz
HSTL-IO on
SMIC 0.13 um CMOS process, and demonstrated the highest speed PLL developed
in China.
v High
speed programmable ladder divider
Ø Haokai
developed a T-style modulus structure for high speed dividers. Haokai owns
the patent
right. Using this technology, a divider under 0.13 um CMOS process can
achieve 4.2 GHz with
dividing range of 2-64. It also only burns 0.3 mW power.
v PLL
frequency synthesizer
Ø
Haokai
used only 2 months to develop a PLL frequency synthesizer, which
successfully solved
problems that its customers have been struggling with for quite a while.
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